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[ DevCourseWeb com ] Udemy - UVM for Verification Part 2 - Projects
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1. Agenda
1. Course Overview.mp4
1. Course Overview.srt
10. Understanding TLM Analysis FIFO
1. Understanding TLM FIFO usage.mp4
1. Understanding TLM FIFO usage.srt
2. Demonstration.mp4
2. Demonstration.srt
3. Code.html
4. Usage of TLM Analysis FIFO P1 Design.mp4
4. Usage of TLM Analysis FIFO P1 Design.srt
5. Usage of TLM Analysis FIFO P1 Verification Env P1.mp4
5. Usage of TLM Analysis FIFO P1 Verification Env P1.srt
6. Usage of TLM Analysis FIFO P1 Verification Env P2.mp4
6. Usage of TLM Analysis FIFO P1 Verification Env P2.srt
7. Usage of TLM Analysis FIFO P1 Verification Env P3.mp4
7. Usage of TLM Analysis FIFO P1 Verification Env P3.srt
8. Design Code.html
9. Verification Environment.html
11. Understanding Virtual Sequencer
1. Virtual Sequencer P1.mp4
1. Virtual Sequencer P1.srt
2. Virtual Sequencer P2.mp4
2. Virtual Sequencer P2.srt
3. DUT.mp4
3. DUT.srt
4. Verification Environment P1.mp4
4. Verification Environment P1.srt
5. Verification Environment P2.mp4
5. Verification Environment P2.srt
6. Verification Environment P3.mp4
6. Verification Environment P3.srt
7. Design Code.html
8. Verification Environment.html
2. Verification of Combinational Circuit 4-bit Multiplier
1. Multiplier P1.mp4
1. Multiplier P1.srt
2. Multiplier P2.mp4
2. Multiplier P2.srt
3. Multiplier P3.mp4
3. Multiplier P3.srt
4. Design Code.html
5. Verification Environment.html
3. Verification of Sequential Circuit Data Flipflop
1. DFF P1.mp4
1. DFF P1.srt
2. DFF P1.mp4
2. DFF P1.srt
3. DFF P3.mp4
3. DFF P3.srt
4. Design Code.html
5. Verification Code.html
4. Verification of UART
1. Clock Generator for different Baud.mp4
1. Clock Generator for different Baud.srt
10. System Top.mp4
10. System Top.srt
11. Typical Transaction.mp4
11. Typical Transaction.srt
12. Simple TB code.html
13. Verification Environment P1.mp4
13. Verification Environment P1.srt
14. Verification Environment P2.mp4
14. Verification Environment P2.srt
15. Design Code.html
16. Verification Environment.html
2. Verification P1.mp4
2. Verification P1.srt
3. Verification P2.mp4
3. Verification P2.srt
4. Clock Generator Design.html
5. Clock Generator Verification environment.html
6. Understanding UART system.mp4
6. Understanding UART system.srt
7. UART Clock Generator.mp4
7. UART Clock Generator.srt
8. UART Transmitter.mp4
8. UART Transmitter.srt
9. UART Receiver.mp4
9. UART Receiver.srt
5. Verification of SPI Memory
1. Understanding SPI Controller RTL.mp4
1. Understanding SPI Controller RTL.srt
10. Native SPI P2.mp4
10. Native SPI P2.srt
11. Design Code Native.html
12. Verification Environment Native.html
2. Understanding SPI Memory.mp4
2. Understanding SPI Memory.srt
3. Typical Transactions.mp4
3. Typical Transactions.srt
4. SPI controller P1.mp4
4. SPI controller P1.srt
5. SPI controller P2.mp4
5. SPI controller P2.srt
6. Design Code.html
7. Verification Environment.html
8. Understanding Native Transactions.mp4
8. Understanding Native Transactions.srt
9. Native SPI P1.mp4
9. Native SPI P1.srt
6. Verification of I2C Memory
1. Understanding I2C.mp4
1. Understanding I2C.srt
2. I2C Slave Memory.mp4
2. I2C Slave Memory.srt
3. I2C Master Controller.mp4
3. I2C Master Controller.srt
4. Typical Transaction to DUT.mp4
4. Typical Transaction to DUT.srt
5. Verification Environment P1.mp4
5. Verification Environment P1.srt
6. Verification Environment P2.mp4
6. Verification Environment P2.srt
7. Design Code.html
8. Verification Environment.html
7. Veriicantion of APB_RAM
1. Fundamentals.mp4
1. Fundamentals.srt
2. Understanding Design.mp4
2. Understanding Design.srt
3. Understanding Transactions.mp4
3. Understanding Transactions.srt
4. ABP_RAM P1.mp4
4. ABP_RAM P1.srt
5. ABP_RAM P2.mp4
5. ABP_RAM P2.srt
6. ABP_RAM P3.mp4
6. ABP_RAM P3.srt
7. Design Code.html
8. Verification Environment.html
8. Verification of AXI Memory
1. Understanding AXI Channels.mp4
1. Understanding AXI Channels.srt
10. Implementing Write Data Channel.mp4
10. Implementing Write Data Channel.srt
11. Implementing Write Response Channel.mp4
11. Implementing Write Response Channel.srt
12. Read Channel.mp4
12. Read Channel.srt
13. Implementing Read Channel.mp4
13. Implementing Read Channel.srt
14. Verification Environment P1.mp4
14. Verification Environment P1.srt
15. Verification Environment P2.mp4
15. Verification Environment P2.srt
16. Verification Environment P3.mp4
16. Verification Environment P3.srt
17. Design Code.html
18. Verification Environment.html
2. Write address Channel.mp4
2. Write address Channel.srt
3. Write Data Channel.mp4
3. Write Data Channel.srt
4. Write Response Channel.mp4
4. Write Response Channel.srt
5. Single Write Transaction.mp4
5. Single Write Transaction.srt
6. Implementing Write Channel P1.mp4
6. Implementing Write Channel P1.srt
7. Understanding Burst Type P1.mp4
7. Understanding Burst Type P1.srt
8. Understanding Burst Type P2.mp4
8. Understanding Burst Type P2.srt
9. Understanding Burst Type P3.mp4
9. Understanding Burst Type P3.srt
9. Understanding usage of Sequence Library
1. Sequence Library P1.mp4
1. Sequence Library P1.srt
2. Sequence Library P2.mp4
2. Sequence Library P2.srt
3. Code.html
Bonus Resources.txt
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